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Vulnerabilities

Vulnerability · CVE-2025-0647

In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another P

Published Jan 14, 2026 · catalog updated Jan 20, 2026 · ARM Neoverse-N2

Last checked Nov 5, 2026. A connected source was read within the last 7 days.

Check if you run it

No confirmed exploitation is on record for CVE-2025-0647. EPSS is 0.17%. Act only if a listed version of ARM Neoverse-N2 is installed.

Gaps on this record

  • No version range is stored. A customer cannot check an installed version against this record.
  • No vendor fix or required action is stored. Compare the linked advisory before you change production.
Severity
High7.9
Known exploitation
Not in CISA/VulnCheck KEV
EPSS
0.17%
Remediation
Vendor / distro source
Affected products
vendor ARM Neoverse-N2 0

In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another PE in the shareability domain. In this case, the PE may retain stale TLB entries which should have been invalidated by the TLBI.

Are you affected?

Enter the version you run. The result uses only the ranges stored on this record.

The check returns affected, not affected, or incomplete. It does not guess a version that is missing from the record.

  • vendor ARM Neoverse-N2 00

How to fix CVE-2025-0647

What to do

Three questions, each answered from this record only. Confirm the vendor advisory before you patch.

Should you patch?

No confirmed exploitation is on record for CVE-2025-0647. EPSS is 0.17%. Act only if a listed version of ARM Neoverse-N2 is installed.

Which versions are affected?

Compare what you have installed with ARM Neoverse-N2 0 0. Compare the installed version with the linked vendor advisory before you change production.

What should an analyst verify?

No weakness class is stored. EPSS 0.17%. There is no CISA KEV listing. No Exploit-DB or Metasploit reference is linked. Use the source links for the original advisory.

Code

The project this record applies to. Exploit listings stay in References.

No public source repository is identified for this product.

Timeline

Detection, updates, and resolution for this record.

  1. Jan 14, 2026 · EUVD

    Detected

    In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another PE in the shareability domain. In this case, the PE may retain stale TLB entries which should have been invalidated by the TLBI.

  2. Jan 20, 2026 · EUVD

    Updated

    In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another PE in the shareability domain. In this case, the PE may retain stale TLB entries which should have been invalidated by the TLBI.

Sources

  • CVE.orgVulnerability recordCVE-2025-0647

    Official CVE identifier

    cve.org
  • FIRST EPSSExploitation probabilityCVE-2025-0647

    30-day exploitation probability 0.17%

    first.org
  • EUVDVulnerability recordEUVD-2026-2516

    In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another PE in the shareability domain. In this case, the PE may retain stale TLB entries which should have be

    euvd.enisa.europa.eu

References

Freshness

Last verified in this catalog Nov 5, 2026. Significant claims (KEV, EPSS, CVSS, affected ranges) come from the source rows above — open the original publisher for the authoritative advisory.

  • FIRST EPSSNov 5, 2026
  • CVE.orgOct 30, 2026
  • EUVDOct 30, 2026